TIC Compression

Memory bandwidth and storage capacity are persistent bottlenecks in modern computing systems, motivating data compression at the hardware level. Unlike software compression libraries, hardware compression must operate at memory bus speeds, support incremental or streaming operation, and maintain access patterns compatible with cache hierarchies and direct memory access. Standard compression algorithms — LZ77, Huffman coding, and Burrows–Wheeler Transform — are often unsuitable for hardware deployment due to their variable latency, block-oriented operation, and complex decompression requirements.

The TIC (Text Incremental Compression) technique addresses these constraints through a dictionary-based encoding scheme that operates incrementally on plain-text data. TIC maintains a hash table of word frequencies, assigns compact code-words to frequent terms, and supports four core operations: compression, decompression, lookup, and lookup-and-replace. The scheme is designed so that lookup operations on compressed data are efficient without requiring full decompression, a property critical for memory subsystem integration.

This project extends the preliminary PIC work (IEEE ICCD 2018) into a complete lightweight compression framework with rigorous analysis of compression ratio, code-word encoding efficiency, and hardware interface compatibility. It is funded by Kuwait University Research Sector (grant EO09/25) and is conducted in collaboration with the University of Oxford.